1. Field of the Disclosure
The present disclosure relates generally to an apparatus for analog to digital conversion and a method for operation thereof.
2. Description of the Related Art
A successive approximation register (SAR) analog-digital converter (ADC) is one type of low-power ADC. To use a high resolution, i.e., resolution greater than or equal to 10 bits, SAR ADC, a split-capacitor digital-analog converter (DAC) array is very effective for a small circuit area and has low-power consumption. A primary disadvantage of the split-capacitor DAC array structure is that performance thereof is highly dependent on an accurate value of a bridge capacitor. If the value of the bridge capacitor is not accurate, an error may occur. Therefore, correction of the bridge capacitor is provided for the split-capacitor DAC array structure. Accordingly, there is a need for a method of correcting the bridge capacitor.